for further information contact your local stmicroelectronics sales office. october 2014 docid027006 rev 1 1/8 EVLPOWERSTEP01 system-in-package integrating micr ostepping controller and 10 a power mosfets demonstration board data brief features ? voltage range from 10.5 v to 85 v ? 10 a r.m.s. maximum output current ? up to 1/128 microstep ? programmable speed profile and advanced commands ? adjustable output slew rate ? spi with daisy chain feature ? flag and busy led indicators ? flexible supply voltage management ? suitable to be used in combination with steval-pcc009v2 applications ? high power bipolar stepper motors: ? stage lighting ? surveillance systems ? textile and sewing machines ? pick and place machines description the EVLPOWERSTEP01 demonstration board is a microstepping motor driver delivering up to 10 a r.m.s. . in combination with the steval- pcc009v2 communication board and the evaluation software, the board allows the user to investigate all the featur es of the powerstep01. in particular, the board can be used to check the performance and to regulate the parameters in order to fit the application requirements. the EVLPOWERSTEP01 supports the daisy chain configuration making it suitable for the evaluation of the powerstep01 in multi motor applications. www.st.com
board description EVLPOWERSTEP01 2/8 docid027006 rev 1 board description figure 1. jumpers and connectors location table 1. electrical specifications parameter value supply voltage (vs) 10.5 v to 85 v maximum output current (each phase) 10 a r.m.s. gate drivers supply voltage (vcc) 7.5 v to 15 v logic supply voltage 3.3 v logic interface supply voltage 3.3 v or 5 v low logic level input 0 v high logic level input vdd (1) operating ambient temperature 0 c to +85 c 1. all logic inputs are 5 v tolerant. 0 d v w h u 6 3 , f r q q h f w r u ) / $ * / ( ' % 8 6 < / ( ' 6 o d y h 6 3 , f r q q h f w r u 3 r z h u v x s s o \ f r q q h f w r u 9 9 0 r w r u v x s s o \ y r o w d j h f r p s h q v d w l r q w u l p p h u $ ' & , 1 l q s x w 6 7 & . l q s x w 9 6 w h v w s r l q w 9 5 ( * w h v w s r l q w 6 7 % < s x o o x s m x p s h u 9 ' ' w h v w s r l q w 9 & & w h v w s r l q w * u r x q g w h v w s r l q w * u r x q g w h v w s r l q w ( [ w h u q d o r v f l o o d w r u f r q q h f w r u 2 6 & , 1 d q g 2 6 & 2 8 7 ( [ w h u q d o v z l w f k f r q q h f w r u 6 : l q s x w 6 3 , w h u p l q d w l r q m x p s h u 6 x s s o \ p d q d j h p h q w f r q q h f w r u 9 6 9 6 5 ( * 9 & & 5 ( * d q g * 1 ' 6 x s s o \ p d q d j h p h q w m x p s h u v 0 r w r u s k d v h % f r q q h f w r u % u l g j h % v k x q w u h v l v w r u v % u l g j h $ v k x q w u h v l v w r u v 0 r w r u s k d v h $ f r q q h f w r u s r z h u 6 7 ( 3 $ 0
docid027006 rev 1 3/8 EVLPOWERSTEP01 board description 8 table 2. jumpers and connectors description name type function j4 power supply main supply voltage j1 power output power bridge a outputs j3 power output power bridge b outputs j6 power supply integrated voltage regulator inputs j5 spi master spi connector j7 spi slave spi connector jp3 jumper vs to vsreg jumper jp4 jumper vsreg to vcc jumper jp5 jumper vcc to vccreg jumper jp6 jumper vccreg to vreg jumper jp7 jumper vreg to vdd jumper jp8 jumper vdd to 3.3 v from spi connector jumper jp9 jumper daisy chain termination jumper jp10 jumper stby to vs pull-up jumper table 3. master spi connector pinout (j5) pin number type function 1 open drain output powerstep01 busy output 2 open drain output powerstep01 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi ?master in slave out? signal (connected to powerstep01 sdo output through daisy chain termination jumper jp9) 6 digital input spi ?serial clock? signal (connected to powerstep01 ck input) 7 digital input spi ?master out slave in? signal (connected to powerstep01 sdi input) 8 digital input spi ?slave select? signal (connected to powerstep01 cs input) 9 digital input powerstep01 step-clock input 10 digital input powerstep01 standby/reset input
board description EVLPOWERSTEP01 4/8 docid027006 rev 1 table 4. slave spi connector pinout (j7) pin number type function 1 open drain output powerstep01 busy output 2 open drain output powerstep01 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi ?master in slave out? signal (connected to pin 5 of j5) 6 digital input spi ?serial clock? signal (connected to powerstep01 ck input) 7 digital input spi ?master out slave in? si gnal (connected to powerstep01 sdo output) 8 digital input spi ?slave select? signal (connected to powerstep01 cs input) 9 digital input powerstep01 step-clock input 10 digital input powerstep01 standby/reset input
docid027006 rev 1 5/8 EVLPOWERSTEP01 board description 8 figure 2. schematic page 1 of 2 $ s s o l f d w l r q u h i h u h q f h 2 8 7 $ 2 8 7 $ 2 8 7 % 2 8 7 % 6 7 % < b 5 ( 6 ( 7 q & 6 & . 6 ' , % 8 6 < ) / $ * 6 7 & . 6 : 6 ' 2 $ ' & b , 1 9 6 9 6 b 5 ( * 9 & & 9 & & b 5 ( * 9 5 ( * 9 ' ' 9 ' ' 9 ' ' & q ) 9 5 - & q ) 9 ' % $ 5 6 ) , / 0 & q ) 9 - 3 2 3 ( 1 & q ) 9 & q ) 9 5 5 & q ) 9 5 - 1 0 - 3 2 3 ( 1 & q ) 9 8 s r z h u 6 7 ( 3 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 % 2 8 7 $ 2 8 7 $ 2 8 7 $ 2 8 7 $ 2 8 7 $ 2 8 7 $ 2 8 7 $ 2 8 7 $ 6 ( 1 6 ( $ b 3 6 ( 1 6 ( $ b 3 6 ( 1 6 ( $ b 3 6 ( 1 6 ( % b 3 6 ( 1 6 ( % b 3 6 ( 1 6 ( % b 3 & 3 9 6 9 % 2 2 7 9 6 5 ( * 9 & & 9 & & 5 ( * 9 5 ( * 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 6 ( 1 6 ( $ b 3 6 ( 1 6 ( % b 3 * 1 ' * 1 ' * 1 ' 6 ( 1 6 ( $ b 6 6 ( 1 6 ( % b 6 6 7 & . & . 6 ' , 9 ' ' , 2 6 ' 2 % 8 6 < b 6 < 1 & ) / $ * 6 : 6 7 % < b 5 ( 6 ( 7 & 6 2 6 & , 1 2 6 & 2 8 7 $ ' & , 1 6 ( 1 6 ( $ b 3 6 ( 1 6 ( % b 3 6 ( 1 6 ( % b 3 * 1 ' 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 9 6 6 ( 1 6 ( $ b 3 6 ( 1 6 ( $ b 3 6 ( 1 6 ( $ b 3 6 ( 1 6 ( % b 3 6 ( 1 6 ( % b 3 5 & q ) 9 & q ) 9 & q ) 9 & q ) 9 & q ) 9 5 5 : & 9 5 - $ 0
board description EVLPOWERSTEP01 6/8 docid027006 rev 1 figure 3. schematic page 2 of 2 6 3 , b , 1 6 3 , b 2 8 7 9 6 9 6 b 5 ( * 9 & & b 5 ( * * 1 ' 2 3 7 , 2 1 9 6 * 1 ' 9 9 6 ' 2 6 7 % < b 5 ( 6 ( 7 6 7 % < b 5 ( 6 ( 7 6 7 & . 6 7 & . q & 6 & . 6 ' , % 8 6 < % 8 6 < ) / $ * ) / $ * q & 6 & . ) / $ * % 8 6 < 6 7 & . 6 7 % < b 5 ( 6 ( 7 $ ' & b , 1 q & 6 & . 6 ' , 6 ' 2 ) / $ * % 8 6 < 6 7 % < b 5 ( 6 ( 7 6 7 & . 6 : 9 9 9 ' ' 9 ' ' 9 9 6 9 6 b 5 ( * 9 & & 9 & & b 5 ( * 9 5 ( * 9 ' ' 9 ' ' 9 6 b 5 ( * 9 6 9 6 b 5 ( * 9 & & b 5 ( * 9 6 9 6 5 5 - 1 0 ' % = ; % 9 5 & q ) 9 - - 3 - 3 - 7 3 9 ' ' - 3 ' / / ( ' 5 ( ' 9 5 ( * ' / / ( ' $ 0 % ( 5 - 1 0 6 7 & . 9 & & 9 6 - 3 5 1 0 5 5 & 9 7 3 & $ 9 5 ' % = ; % 9 - - 3 - 3 - 3 - 3 $ 0
docid027006 rev 1 7/8 EVLPOWERSTEP01 revision history 8 revision history table 5. document revision history date revision changes 07-oct-2014 1 initial release.
EVLPOWERSTEP01 8/8 docid027006 rev 1 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved
|
